The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device. Particularly, it is suited for use in a semiconductor device having, in a deep trench thereof, a substrate contact.
A MOS (metal oxide semiconductor) transistor is sometimes formed on a semiconductor substrate having an epitaxial layer (epi substrate) or a SOI (silicon on insulator) substrate.
For example, Japanese Unexamined Patent Application Publication No. 2013-222838 (Patent Document 1) discloses a semiconductor device having a high breakdown voltage MOS transistor and a CMOS transistor. An element formation region in which the high breakdown voltage MOS transistor and the CMOS transistor are to be formed is surrounded by an isolation formed in a deep trench (deep trench isolation).